may 2004 2004 fairchild semiconductor corporation fdd6670a rev e (w) fdd6670a 30v n-channel powertrench mosfet general description this n-channel mosfet has been designed specifically to improve the overall efficiency of dc/dc converters using either synchronous or conventional switching pwm controllers. it has been optimized for low gate charge, low r ds ( on) , fast switching speed and extremely low r ds(on) in a small package. applications dc/dc converter motor drives features 66 a, 30 v r ds(on) = 8 m w @ v gs = 10 v r ds(on) = 10 m w @ v gs = 4.5 v low gate charge fast switching high performance trench technology for extremely low r ds(on) g s d to-252 d-pak (to-252) s g d absolute maximum ratings t a =25 o c unless otherwise noted symbol parameter ratings units v dss drain-source voltage 30 v v gss gate-source voltage 20 v i d continuous drain current @t c =25c (note 3) 66 a @t a =25c (note 1a) 15 pulsed (note 1a) 100 power dissipation @t c =25c (note 3) 63 @t a =25c (note 1a) 3.2 p d @t a =25c (note 1b) 1.3 w t j , t stg operating and storage junction temperature range ?55 to +175 c thermal characteristics r q jc thermal resistance, junction-to-case (note 1) 2.4 c/w r q ja thermal resistance, junction-to-ambient (note 1a) 40 r q ja (note 1b) 96 package marking and ordering information device marking device package reel size tape width quantity fdd6670a fdd6670a d-pak (to-252) 13?? 12mm 2500 units fdd6670a
fdd6670a rev. e(w) electrical characteristics t a = 25c unless otherwise noted symbol parameter test conditions min typ max units drain-source avalanche ratings (note 2) e as drain-source avalanche energy single pulse, v dd = 15 v, i d = 66 a 67 mj i as drain-source avalanche current 66 a off characteristics bv dss drain?source breakdown voltage v gs = 0 v, i d = 250 m a 30 v d bv dss d t j breakdown voltage temperature coefficient i d = 250 m a,referenced to 25 c 26 mv/ c i dss zero gate voltage drain current v ds = 24 v, v gs = 0 v 1 m a i gss gate?body leakage v gs = 20 v, v ds = 0 v 100 na on characteristics (note 2) v gs ( th ) gate threshold voltage v ds = v gs , i d = 250 m a 1 1.8 3 v d v gs( th) d t j gate threshold voltage temperature coefficient i d = 250 m a,referenced to 25 c ?5 mv/ c r ds(on) static drain?source on?resistance v gs = 10 v, i d = 15 a v gs = 4.5 v, i d = 13 a v gs = 10 v, i d = 15 a,t j =125 c 6.3 7.9 9.5 8 10 13 m w i d(on) on?state drain current v gs = 10 v, v ds = 5 v 50 a g fs forward transconductance v ds = 10 v, i d = 15 a 60 s dynamic characteristics c iss input capacitance 1755 pf c oss output capacitance 430 pf c rss reverse transfer capacitance v ds = 15 v, v gs = 0 v, f = 1.0 mhz 180 pf r g gate resistance v gs = 15 mv, f = 1.0 mhz 1.3 pf switching characteristics (note 2) t d(on) turn?on delay time 11 20 ns t r turn?on rise time 12 21 ns t d(off) turn?off delay time 29 47 ns t f turn?off fall time v dd = 15 v, i d = 1 a, v gs = 10 v, r gen = 6 w 19 34 ns q g total gate charge 16 22 nc q gs gate?source charge 4.6 nc q gd gate?drain charge v ds = 15v, i d = 15 a, v gs = 5 v 6.2 nc fdd6670a
fdd6670a rev. e(w) d r p ds(on) electrical characteristics t a = 25c unless otherwise noted symbol parameter test conditions min typ max units drain?source diode characteristics and maximum ratings i s maximum continuous drain?source diode forward current 2.3 a v sd drain?source diode forward voltage v gs = 0 v, i s = 2.3 a (note 2) 0.74 1.2 v t rr diode reverse recovery time 28 ns q rr diode reverse recovery charge i f = 15 a, d if / d t = 100 a/s 18 nc notes: 1. r q ja is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. r q jc is guaranteed by design while r q ca is determined by the user's board design. a) r q ja = 45c/w when mounted on a 1in 2 pad of 2 oz copper b) r q ja = 96c/w when mounted on a minimum pad. scale 1 : 1 on letter size paper 2. pulse test: pulse width < 300 m s, duty cycle < 2.0% 3. maximum current is calculated as: where p d is maximum power dissipation at t c = 25c and r ds( on) is at t j(max) and v gs = 10v. package current limitation is 21a fdd6670a
fdd6670a rev. e(w) typical characteristics 0 20 40 60 80 100 0 0.5 1 1.5 2 2.5 v ds , drain-source voltage (v) i d , drain current (a) 3.5v v gs =10v 4.0v 3.0v 4.5v 6.0v 0.8 1 1.2 1.4 1.6 1.8 2 2.2 2.4 2.6 2.8 0 20 40 60 80 100 i d , drain current (a) r ds(on) , normalized drain-source on-resistance v gs = 3.0v 4.0v 6.0v 4.5v 3.5v 10v figure 1. on-region characteristics figure 2. on-resistance variation with drain current and gate voltage 0.6 0.8 1 1.2 1.4 1.6 -50 -25 0 25 50 75 100 125 150 t j , junction temperature ( o c) r ds(on) , normalized drain-source on-resistance i d = 15a v gs = 10v 0.005 0.0075 0.01 0.0125 0.015 0.0175 0.02 2 4 6 8 10 v gs , gate to source voltage (v) r ds(on) , on-resistance (ohm) i d = 8a t a = 125 o c t a = 25 o c figure 3. on-resistance variation withtemperature figure 4. on-resistance variation with gate-to-source voltage 0 15 30 45 60 75 90 1.5 2 2.5 3 3.5 4 v gs , gate to source voltage (v) i d , drain current (a) t a =125 o c 25 o c v ds = 5v -55 o c 0.0001 0.001 0.01 0.1 1 10 100 1000 0 0.2 0.4 0.6 0.8 1 1.2 v sd , body diode forward voltage (v) i s , reverse drain current (a) t a = 125 o c 25 o c -55 o c v gs = 0v figure 5. transfer characteristics figure 6. body diode forward voltage variation with source current and temperature fdd6670a
fdd6670a rev. e(w) typical characteristics 0 2 4 6 8 10 0 5 10 15 20 25 30 35 q g , gate charge (nc) v gs , gate-source voltage (v) i d = 15a v ds = 10v 15v 20v 0 400 800 1200 1600 2000 2400 0 5 10 15 20 25 30 v ds , drain to source voltage (v) capacitance (pf) c iss c rss c oss f = 1mhz v gs = 0 v figure 7. gate charge characteristics figure 8. capacitance characteristics 0.01 0.1 1 10 100 1000 0.01 0.1 1 10 100 v ds , drain-source voltage (v) i d , drain current (a) dc 1s 100ms r ds(on) limit v gs = 10v single pulse r q ja = 96 o c/w t a = 25 o c 10ms 1ms 100s 10s 0 20 40 60 80 100 0.01 0.1 1 10 100 t 1 , time (sec) p(pk), peak transient power (w) single pulse r q ja = 96c/w t a = 25c figure 9. maximum safe operating area figure 10. single pulse maximum power dissipation 0.001 0.01 0.1 1 0.001 0.01 0.1 1 10 100 1000 t 1 , time (sec) r(t), normalized effective transient thermal resistance r q ja (t) = r(t) * r q ja r q ja = 96 c/w t j - t a = p * r q ja (t) duty cycle, d = t 1 / t 2 p(pk) t 1 t 2 single pulse 0.0 0.02 0.05 0.1 0.2 d = 0.5 figure 11. transient thermal response curve thermal characterization performed using the conditions described in note 1b. transient thermal response will change depending on the circuit board design. fdd6670a
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